{"id":189625,"date":"2025-03-26T17:07:15","date_gmt":"2025-03-26T08:07:15","guid":{"rendered":"http:\/\/ee.presscat.kr\/?post_type=research-achieve&p=189625"},"modified":"2026-04-13T07:00:56","modified_gmt":"2026-04-12T22:00:56","slug":"ee-professor-minsoo-rhus-research-team-develops-a-simulation-framework-called-vtrain","status":"publish","type":"research-achieve","link":"http:\/\/ee.presscat.kr\/en\/research-achieve\/ee-professor-minsoo-rhus-research-team-develops-a-simulation-framework-called-vtrain\/","title":{"rendered":"EE Professor Minsoo Rhu\u2019s research team develops a simulation framework called vTrain"},"content":{"rendered":"
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\u3008 (From left) Professor Minsoo Rhu, Ph.D. candidate Jehyeon Bang, and Dr. Yujeong \u3009<\/figcaption><\/figure>\n

Large AI models such as ChatGPT and DeepSeek are gaining attention as they’re being applied across diverse fields. These large language models (LLMs) require training on massive distributed systems composed of tens of thousands of data center GPUs. For example, the cost of training GPT-4 is estimated at approximately 140 billion won. A team of Korean researchers has developed a technology that optimizes parallelization configurations to increase GPU efficiency and significantly reduce training costs.<\/span><\/p>\n

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An EE research team led by Professor Minsoo Rhu, in collaboration with the Samsung Advanced Institute of Technology (SAIT), has developed a simulation framework called vTrain, which accurately predicts and optimizes the training time of LLMs in large-scale distributed environments.<\/span><\/p>\n

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To efficiently train LLMs, it’s crucial to identify the optimal distributed training strategy. However, the vast number of potential strategies makes real-world testing prohibitively expensive and time-consuming. As a result, companies currently rely on a limited number of empirically validated strategies, causing inefficient GPU utilization and unnecessary increases in training costs. The absence of suitable large-scale simulation technology has significantly hindered companies from effectively addressing this issue.<\/span><\/p>\n

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To overcome this limitation, Professor Rhu\u2019s team developed vTrain, which can accurately predict training time and quickly evaluate various parallelization strategies. Through experiments conducted in multi-GPU environments, vTrain’s predictions were compared against actual measured training times, resulting in an average absolute percentage error (MAPE) of 8.37% on single-node systems and 14.73% on multi-node systems.<\/span><\/p>\n

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\u3008 Figure 1. Schematic diagram of the vTrain simulator architecture \u3009<\/figcaption><\/figure>\n

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In collaboration with SAIT, the team has also released the vTrain framework along with over 1,500 real-world training time measurement datasets as open-source software (https:\/\/github.com\/VIA-Research\/vTrain<\/a>) for free use by AI researchers and companies.<\/span><\/p>\n

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\u3008 Figure 2. Comparison of measured and predicted training times for single-node (left) and multi-node (right) systems (Figure caption as provided in the original article) \u3009<\/figcaption><\/figure>\n

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Professor Rhu commented, \u201cvTrain utilizes a profiling-based simulation approach to explore training strategies that enhance GPU utilization and reduce training costs compared to conventional empirical methods. With the open-source release, companies can now efficiently cut the costs associated with training ultra-large AI models.\u201d<\/span><\/p>\n

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\u3008 Figure 3. Changes in MT-NLG training time and GPU utilization with various parallelization techniques (Figure caption as provided in the original article) \u3009<\/figcaption><\/figure>\n

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This research, with Ph.D. candidate Jehyeon Bang as the first author, was presented last November at MICRO, the joint International Symposium on Microarchitecture hosted by IEEE and ACM, one of the premier conferences in computer architecture. (Paper title: \u201cvTrain: A Simulation Framework for Evaluating Cost-Effective and Compute-Optimal Large Language Model Training\u201d, https:\/\/doi.org\/10.1109\/MICRO61859.2024.00021<\/a>)<\/span><\/p>\n

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This work was supported by the Ministry of Science, ICT, the National Research Foundation of Korea, the Information and Communication Technology Promotion Agency, and Samsung Electronics, as part of the SW Star Lab project for the development of core technologies in the SW computing industry.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"

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