{"id":112760,"date":"2007-08-20T00:00:00","date_gmt":"2007-08-19T15:00:00","guid":{"rendered":"http:\/\/175.125.95.178\/research-achieve\/12760\/"},"modified":"2026-04-13T09:14:15","modified_gmt":"2026-04-13T00:14:15","slug":"12760","status":"publish","type":"research-achieve","link":"http:\/\/ee.presscat.kr\/en\/research-achieve\/12760\/","title":{"rendered":"Hyunjin Lee whose adviser is Prof. Choi, Yang-Kyu won the Best Student Paper Award at the Symposium on VLSI Technology."},"content":{"rendered":"<table border=\"0\" cellspacing=\"0\" cellpadding=\"0\" align=\"left\">\n<tr>\n<td><img decoding=\"async\" src=\"\/userfiles\/image\/article\/\uc774\ud604\uc9c4-6.jpg\" alt=\"\" title=\"\"><\/td>\n<\/tr>\n<tr>\n<td align=\"center\">\u25b2 Lee, Hyunjin<\/td>\n<\/tr>\n<\/table>\n<p>Symposium on VLSI Technology, Best Student Paper Award<\/p>\n<p>Hyunjin Lee who is studying for Ph. D degree at the NanO-Bio-Electronic-Laboratory in KAIST received the Best Student Paper Award in the Symposium on VLSI Technology held at Kyoto, Japan on June 13th.<\/p>\n<p>It is the first time that a graduate student in Korea wins the prize with the research result worked on in Korea.<\/p>\n<p> Last year, she also won the same prize at the same symposium with the thesis, Sub-5nm All-Around Gate FinFET for Ultimate Scaling. This paper has been valued that it made a great step through the limitation of silicon semiconductor technology by suggesting the new structure and the skill of the Tera-scale semiconductor devices.<\/p>\n<p>The Best Student Paper Award is selected as the most effective thesis in VLSI technology by both IEEE(The IEEE Electron Devices Society) and AP (The Japan Society of Applied Physics).<\/p>\n<p>The Symposium on VLSI Technology, 27th this year, is the biggest level of world international semiconductor symposium which is held every year either in Kyoto, Japan or in Hawaii, USA. <\/p>\n<p>\u25cb Thesis: \u201cSub-5nm All-Around Gate FinFET for Ultimate Scaling\u201d <\/p>\n<p>by H. Lee, L.-E. Yu, S.-W. Ryu, J.-W. Han, K. Jeon, D.-Y. Jang, K.-H. Kim, J. Lee, J.-H. Kim, S. C. Jeon, G. S. Lee, J. S. Oh, Y. C. Park, W. H. Bae, H. M. Lee, J. M. Yang, J. J. Yoo, S. I. Kim and Y.-K. Choi <\/p>\n<p>\u25cb Abstract:<\/p>\n<p>Sub-5nm all-around gate FinFETs with 3nm fin width were fabricated for the first time. The n-channel FinFET of sub-5nm with 1.4nm HfO2 shows an IDsat of 497 A\/ m at VG=VD=1.0V. Characteristics of sub-5nm transistor are verified by using 3-D simulations as well as analytical models. A threshold voltage increases as the fin width reduces by quantum confinement effects. The threshold voltage shift was fitted to a theoretical model with consideration of the first-order perturbation theory. And a channel orientation effect, based on a current-flow direction, is shown.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>728<\/p>\n","protected":false},"featured_media":0,"template":"","research_category":[],"class_list":["post-112760","research-achieve","type-research-achieve","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/research-achieve\/112760","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/research-achieve"}],"about":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/types\/research-achieve"}],"wp:attachment":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/media?parent=112760"}],"wp:term":[{"taxonomy":"research_category","embeddable":true,"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/research_category?post=112760"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}