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[From left: Professor Seungyoung Ahn, Jo Chun-shik Graduate School of Mobility, Professor Kyungmin Kim, Department of Materials Science and Engineering and Professor Joungho Kim, School of Electrical Engineering]<\/span><\/p>\n \u00a0<\/span><\/p>\n In the KAIST System Semiconductor Packaging Laboratory, where Professor Joungho Kim is the head professor, Professor Seungyoung Ahn of the Cho Chunshik Graduate School of Mobility and Professor Kyung Min Kim of the Department of Materials Science and Engineering collaborate as participating professors. <\/span><\/p>\n They plan to deepen and develop the ‘system semiconductor packaging’ technology through intergenerational research cooperation. Based on this, the goal is to raise the competitiveness of the domestic system semiconductor industry to the next level. \u2018System semiconductor packaging\u2019 is a technology that three-dimensionally integrates a processor and memory, which have been used separately, into a single semiconductor.<\/span><\/p>\n It is a cutting-edge technology that significantly increases the learning calculation ability of artificial intelligence and at the same time reduces power consumption. It is a super-difference technology that continues the existing \u2018Moore\u2019s Law for semiconductors\u2019 and a technology that enables the future artificial intelligence era.<\/span><\/p>\n In particular, the Cross-Generation Collaborative Lab led by Professor Kim is considered the world’s best lab in this field. 3D packaging technology is a key technology for next-generation artificial intelligence semiconductors used in supercomputers, high-performance servers in super-large data centers, and self-driving cars. <\/span><\/p>\n Based on 3D High Performance Heterogeneous Computing Packaging (3D High Performance Heterogeneous Computing Packaging) source technology, it plans to implement a high-performance, low-power, multi-functional system, and in particular, automate this entire design process with an artificial intelligence machine learning method. <\/span><\/p>\n Professor Joungho Kim, an IEEE Fellow, has been honored to open a first-generation collaborative laboratory among KAIST professors in the School of Electrical Engineering. Professor Joungho Kim of the ‘KAIST System Semiconductor Packaging Laboratory’ said, “We will contribute to enhancing the competitiveness of the domestic semiconductor industry by realizing specialized research in the field of system semiconductor packaging, which is essential for Korea to establish itself as a true semiconductor powerhouse.”<\/span><\/p>\n <\/p>\n","protected":false},"excerpt":{"rendered":" 1169<\/p>\n","protected":false},"featured_media":137890,"template":"","notice_category":[174],"class_list":["post-137893","notice-post","type-notice-post","status-publish","has-post-thumbnail","hentry","notice_category-general-news"],"acf":[],"_links":{"self":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/notice-post\/137893","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/notice-post"}],"about":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/types\/notice-post"}],"wp:featuredmedia":[{"embeddable":true,"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/media\/137890"}],"wp:attachment":[{"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/media?parent=137893"}],"wp:term":[{"taxonomy":"notice_category","embeddable":true,"href":"http:\/\/ee.presscat.kr\/en\/wp-json\/wp\/v2\/notice_category?post=137893"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}