{"id":116925,"date":"2017-11-15T00:00:00","date_gmt":"2017-11-14T15:00:00","guid":{"rendered":"http:\/\/175.125.95.178\/ai-in-device\/16925\/"},"modified":"2026-05-03T04:59:38","modified_gmt":"2026-05-02T19:59:38","slug":"16925","status":"publish","type":"ai-in-device","link":"http:\/\/ee.presscat.kr\/en\/ai-in-device\/16925\/","title":{"rendered":"Professors Yang-Kyu Choi & Sung-Yool Choi\u2019s research group develops wearable logic in-memory circuitry on commercial fabric"},"content":{"rendered":"

Professors Yang-Kyu Choi & Sung-Yool Choi\u2019s research group were reported in Etnews about the wearable logic-in-memory using memristor on February 10th, 2018.<\/p>\n

The research develops a wearable logic-in-memory based on memristors by weaving a special thread coated with electrode and polymer insulating layer.<\/p>\n

The study was published in the October 2017 issue of the international journal “Nano Letters.” (Impact factor 2017 : 12.080)<\/p>\n

 <\/p>\n

Media: \u2018KAIST, implementing storage and computation device by weaving the thread\u2026 Implementing new concept of the wearable device\u2019<\/p>\n

http:\/\/www.etnews.com\/20180328000205<\/a><\/p>\n

KAIST EE: \u2018Research by Ph.D candidate Bae, Hak-Yeol and Jang, Byung-Cheol has been published in Nano Letters’<\/p>\n

http:\/\/ee.presscat.kr\/en\/research-achieve\/15452\/<\/a><\/p>\n

 <\/p>\n

Article title: Functional Circuitry on Commercial Fabric via Textile-Compatible Nanoscale Film Coating Process for Fibertronics<\/strong><\/p>\n

A research article authored by Hagyoul Bae (KAIST EE), Byung Chul Jang (KAIST EE), Hongkeun Park (KAIST CBE), Soo-Ho Jung (KIMS), Hye Moon Lee (KIMS), Jun-Young Park (KAIST EE), Seung-Bae Jeon (KAIST EE), Gyeongho Son (KAIST EE), Il-Woong Tcho (KAIST EE), Kyoungsik Yu (KAIST EE), Sung Gap Im (KAIST CBE), Sung-Yool Choi (KAIST EE; Corresponding author), and Yang-Kyu Choi (KAIST EE; Corresponding author) was published in Nano Letters<\/em> (2017.10)<\/p>\n

Fabric-based electronic textiles (e-textiles) are the fundamental components of wearable electronic systems, which can provide convenient hand-free access to computer and electronics applications. However, e-textile technologies presently face significant technical challenges. These challenges include difficulties of fabrication due to the delicate nature of the materials, and limited operating time, a consequence of the conventional normally on computing architecture, with volatile power-hungry electronic components, and modest battery storage. Here, we report a novel poly(ethylene glycol dimethacrylate) (pEGDMA)-textile memristive nonvolatile logic-in-memory circuit, enabling normally off computing, that can overcome those challenges. To form the metal electrode and resistive switching layer, strands of cotton yarn were coated with aluminum (Al) using a solution dip coating method, and the pEGDMA was conformally applied using an initiated chemical vapor deposition process. The intersection of two Al\/pEGDMA coated yarns becomes a unit memristor in the lattice structure. The pEGDMA-Textile Memristor (ETM), a form of crossbar array, was interwoven using a grid of Al\/pEGDMA coated yarns and untreated yarns. The former were employed in the active memristor and the latter suppressed cell-to-cell disturbance. We experimentally demonstrated for the first time that the basic Boolean functions, including a half adder as well as NOT, NOR, OR, AND, and NAND logic gates, are successfully implemented with the ETM crossbar array on a fabric substrate. This research may represent a breakthrough development for practical wearable and smart fibertronics.<\/p>\n

\"\"<\/p>\n

Figure 1.<\/strong> A<\/strong> Conceptual image of the fabricated memory device based on the cross-linked Al\/pEGDMA-coated yarns. B<\/strong> Bipolar I\u2212V characteristic of the fabricated ETM array on the cotton substrate with a pEGDMA film thickness of 60 nm. The inset shows the optical microscope image of the fabricated ETM array and the schematic image of the Al\/pEGDMA-coated yarn. C<\/strong> Schematic view of the formation of a conductive carbon filament bridging of TE and BE via the pEGDMA. D<\/strong> Schematic of the logic-in-memory operations of NOR and NOT gates and their equivalent circuits within the crossbar array via the MAGIC architecture. The inset presents a conceptual image for integration of each logic gate on the fabric. E<\/strong> Experimental results of the MAGIC-NOR gate. F<\/strong> Experimental results of the MAGIC-NOT gate.<\/p>\n","protected":false},"excerpt":{"rendered":"

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